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/*==LICENSE==*
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CyanWorlds.com Engine - MMOG client, server and tools
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Copyright (C) 2011 Cyan Worlds, Inc.
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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Additional permissions under GNU GPL version 3 section 7
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If you modify this Program, or any covered work, by linking or
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combining it with any of RAD Game Tools Bink SDK, Autodesk 3ds Max SDK,
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NVIDIA PhysX SDK, Microsoft DirectX SDK, OpenSSL library, Independent
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JPEG Group JPEG library, Microsoft Windows Media SDK, or Apple QuickTime SDK
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(or a modified version of those libraries),
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containing parts covered by the terms of the Bink SDK EULA, 3ds Max EULA,
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PhysX SDK EULA, DirectX SDK EULA, OpenSSL and SSLeay licenses, IJG
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JPEG Library README, Windows Media SDK EULA, or QuickTime SDK EULA, the
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licensors of this Program grant you additional
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permission to convey the resulting work. Corresponding Source for a
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non-source form of such a combination shall include the source code for
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the parts of OpenSSL and IJG JPEG Library used as well as that of the covered
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work.
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You can contact Cyan Worlds, Inc. by email legal@cyan.com
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or by snail mail at:
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Cyan Worlds, Inc.
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14617 N Newport Hwy
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Mead, WA 99021
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*==LICENSE==*/
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//////////////////////////////////////////////////////////////////////
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//
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// hsCpuID - Processor feature detection and function dispatcher
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//
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//
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// == Example Usage ==
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//
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// #ifdef HS_SIMD_INCLUDE
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// # include HS_SIMD_INCLUDE
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// #endif
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//
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// float my_func_fpu() {
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// ...
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// }
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//
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// float my_func_avx() {
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// #ifdef HS_AVX
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// ...
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// #endif
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// }
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//
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//
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// typedef float(*func_ptr)();
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// static hsFunctionDispatcher<func_ptr> my_func;
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//
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// hsFunctionDispatcher<func_ptr> my_func(my_func_fpu, 0, 0, 0, 0, 0, 0, my_func_avx);
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// my_func();
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//
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//////////////////////////////////////////////////////////////////////
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#ifndef hsCpuID_inc
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#define hsCpuID_inc
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#if defined __AVX2__ || _MSC_VER >= 1600
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#define HS_AVX2
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#ifndef HS_SIMD_INCLUDE
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# define HS_SIMD_INCLUDE "immintrin.h"
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#endif
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#endif
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#if defined __AVX__ || _MSC_VER >= 1600
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#define HS_AVX
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#ifndef HS_SIMD_INCLUDE
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# define HS_SIMD_INCLUDE "immintrin.h"
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#endif
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#endif
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#if defined __SSE4_2__ || _MSC_VER >= 1600
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#define HS_SSE42
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#ifndef HS_SIMD_INCLUDE
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# define HS_SIMD_INCLUDE "nmmintrin.h"
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#endif
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#endif
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#if defined __SSE4_1__ || _MSC_VER >= 1600
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#define HS_SSE41
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#ifndef HS_SIMD_INCLUDE
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# define HS_SIMD_INCLUDE "smmintrin.h"
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#endif
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#endif
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#if defined __SSSE3__ || _MSC_VER >= 1600
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#define HS_SSSE3
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#ifndef HS_SIMD_INCLUDE
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# define HS_SIMD_INCLUDE "tmmintrin.h"
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#endif
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#endif
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#if defined __SSE3__ || _MSC_VER >= 1400
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#define HS_SSE3
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#ifndef HS_SIMD_INCLUDE
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# define HS_SIMD_INCLUDE "pmmintrin.h"
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#endif
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#endif
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#if defined __SSE2__ || _MSC_VER >= 1300
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#define HS_SSE2
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#ifndef HS_SIMD_INCLUDE
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# define HS_SIMD_INCLUDE "emmintrin.h"
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#endif
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#endif
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#if defined __SSE__ || _MSC_VER >= 1300
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#define HS_SSE1
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#ifndef HS_SIMD_INCLUDE
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# define HS_SIMD_INCLUDE "xmmintrin.h"
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#endif
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#endif
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struct hsCpuId {
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bool has_sse1;
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bool has_sse2;
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bool has_sse3;
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bool has_ssse3;
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bool has_sse41;
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bool has_sse42;
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bool has_avx;
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bool has_avx2;
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hsCpuId();
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static const hsCpuId& Instance();
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};
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template <typename func_ptr>
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struct hsCpuFunctionDispatcher {
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hsCpuFunctionDispatcher(func_ptr fpu,
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func_ptr sse1 = nullptr,
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func_ptr sse2 = nullptr,
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func_ptr sse3 = nullptr,
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func_ptr ssse3 = nullptr,
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func_ptr sse41 = nullptr,
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func_ptr sse42 = nullptr,
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func_ptr avx = nullptr,
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func_ptr avx2 = nullptr)
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{
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hsAssert(fpu, "FPU fallback function required.");
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const hsCpuId& cpu = hsCpuId::Instance();
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#ifdef HS_AVX2
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if (cpu.has_avx2 && avx2) {
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call = avx2;
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} else
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#endif
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#ifdef HS_AVX
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if (cpu.has_avx && avx) {
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call = avx;
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} else
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#endif
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#ifdef HS_SSE42
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if (cpu.has_sse42 && sse42) {
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call = sse42;
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} else
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#endif
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#ifdef HS_SSE41
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if (cpu.has_sse41 && sse41) {
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call = sse41;
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} else
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#endif
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#ifdef HS_SSSE3
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if (cpu.has_ssse3 && ssse3) {
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call = ssse3;
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} else
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#endif
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#ifdef HS_SSE3
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if (cpu.has_sse3 && sse3) {
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call = sse3;
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} else
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#endif
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#ifdef HS_SSE2
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if (cpu.has_sse2 && sse2) {
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call = sse2;
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} else
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#endif
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#ifdef HS_SSE1
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if (cpu.has_sse1 && sse1) {
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call = sse1;
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} else
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#endif
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{
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call = fpu;
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}
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};
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func_ptr call;
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};
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#endif // hsCpuID_inc
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